Job Description: As a member of the Switch team, you will be owning verification of SoC & Ethernet IPs for leading edge Ethernet Switch products.

Job Description:

You will be responsible for IP/ ARM sub-system level Verification.
As part of this role, you will be responsible for all verification activities starting from requirement understanding, environment development, test development and execution to final signoff.
Debug, root-cause and resolve functional failures in the design, working closely with design, Integration teams & IP teams

Desired Skills And Experience

B. Tech. with 8years or M. Tech. with 6 years of experience.
Expertise in System Verilog and UVM methodology.
Experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies
Experience in development of System Verilog/UVM based verification environments from scratch is a plus
Experience with IP verification for protocols like AMBA/ ARM CPU cores/PCIe/DDR/ USB/ Ethernet/ Security
Highly motivated individual with strong debugging and analytical skills

R024936

Design Verification Engineer

The Opportunity