Job Description: Role Overview We are looking for an experienced engineer to lead Silicon Validation and Signal Integrity analysis for our next-generation high-speed interconnect products. In this role, you will bridge the gap between theory and reality, driving simulation strategies for 112G/224G systems and executing rigorous post-silicon characterization for DSP and Optical PHYs.
Key Responsibilities
Post-Silicon Leadership: Lead the post-silicon validation and electrical characterization of PHY layer chips, specifically for DSP and Optical products.
Test Development: Define validation plans and develop automated test benches for high-speed I/O testing.
Interoperability: Conduct interoperability testing and validate Broadcom PLP products with Broadcom Tomahawk Switches.
Debugging: Troubleshooting and debug complex hardware issues related to power integrity, signal integrity, and clocking on reference platforms.
High-Speed Link Design: Drive comprehensive SI support for high-data-rate SerDes applications (up to 112Gbps NRZ and 224G PAM4), ensuring channel compliance and performance optimization.
Advanced Simulation: Execute schematic and channel simulations using Keysight ADS. Utilize bit-by-bit and statistical simulators to analyze SerDes link performance, applying numerical analysis and electromagnetic field theory to optimize designs.
Channel Characterization: Perform detailed channel analysis including Insertion Loss (IL), Return Loss (RL), crosstalk, and Time Domain Transmission (TDT).
Noise & Interference: Execute advanced noise analysis, specifically calculating EIPS (Effective Inter-Pair Skew/Signal) and EICN (Effective In-Channel Noise) to ensure robust link margins.
Phase Noise & Jitter: Conduct phase noise analysis for PLLs, reference clocks, and SerDes TX-RX links, alongside jitter sensitivity measurements and BER analysis for SerDes IP.
Correlation: Lead measurement-simulation correlation initiatives. Partner with package, PCB, and silicon design teams to validate design accuracy and refine simulation models based on lab data.
Qualifications Education & Experience:
BS with 8+ years of experience, MS with 6+ years of experience, or PhD with 3+ years of experience in Electrical Engineering, Physics, or a related field.
Technical Expertise:
Theory: Deep understanding of transmission line theory, S-parameters, high-speed serial protocols (Ethernet, PCIe, PAM4 signaling), and electromagnetic field theory.
Simulation Tools: Hands-on experience with SI simulation tools (e.g., Keysight ADS, MATLAB, Mentor Graphics HyperLynx).
Lab Equipment: Proficiency with Vector Network Analyzers (VNA) up to 50GHz+, TDRs, high-bandwidth Oscilloscopes, and BERTs.
Scripting & Automation: Strong experience with MATLAB, Python, or C/C++ for data analysis and lab automation.
Key Competencies:
Ability to work in both time and frequency domains.
Proven track record of bridging pre-silicon design and post-silicon validation.
Strong analytical skills for troubleshooting complex link topology issues.
Additional Job Description: Compensation And Benefits The annual base salary range for this position is $108,000 - $172,800
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
R024846
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