Layout Design, Staff Engineer

Alternate Job Titles:

• Layout Design, Staff Engineer

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are: You are a highly skilled and motivated Analog & Mixed Signal (A&MS) Layout Engineer with over 6 years of experience developing high-speed analog and mixed-signal integrated circuits. Passionate about physical layout design, you thrive on solving complex technical challenges and excel both independently and in collaborative team environments. Your expertise covers deep submicron processes and advanced layout techniques, underpinned by a robust understanding of CMOS and FinFET technologies. You have mastered the nuances of analog and custom digital layout flows, including RX, TX, PLL blocks, and high-speed logic paths.

Proficient with industry-standard CAD tools such as Custom Designer, Cadence Virtuoso, Calibre, ICV, and STAR-RXCT, you possess a sharp analytical mindset that enables you to efficiently debug, verify, and optimize layouts for performance, reliability, and manufacturability. Continuous learning is central to your approach, and you proactively seek out the latest technologies and best practices to advance your craft. Your strong communication skills allow you to engage effectively with senior personnel and cross-functional teams, fostering a culture of technical excellence and innovation.

Accountability and ownership are at the heart of your work ethos. You are adept at managing complex projects with minimal supervision, consistently providing regular status updates and mentoring peers to elevate team performance. Your scripting skills for layout automation demonstrate your commitment to efficiency and process improvement. If you are seeking a role where your deep technical expertise and innovative spirit can truly make an impact, Synopsys welcomes your unique talents.

What You’ll Be Doing:

• Designing and developing physical layouts for high-speed analog and mixed-signal IP blocks, including SerDes, RX, TX, PLL, and custom logic paths.
• Collaborating with a team of experienced layout engineers to deliver optimized, reliable, and manufacturable designs.
• Utilizing advanced CAD tools (Custom Designer, Cadence Virtuoso, Calibre, ICV, STAR-RXCT) for layout creation, verification, and debugging.
• Executing deep submicron layout techniques, including floor-planning, ESD/latchup mitigation, and process technology adaptation.
• Implementing and verifying layout flows such as LEF generation, top-level verification, DRC/LVS/LPE, and power routing with EM/IR considerations.
• Providing technical leadership through knowledge sharing, status updates, and networking with senior internal/external stakeholders.
• Applying scripting skills for layout automation to enhance productivity and reduce manual efforts.

The Impact You Will Have:

• Delivering high-quality analog and mixed-signal IP layouts that enable next-generation silicon innovation.
• Elevating the performance and reliability of Synopsys’ IP portfolio through advanced layout techniques and verification processes.
• Driving successful tape-outs and product launches by ensuring robust design flows and manufacturability.
• Contributing to the technical advancement of the team with your expertise in deep submicron effects and process technology.
• Championing best practices in ESD/latchup mitigation, verification, and design for manufacturability (DFM).
• Fostering a collaborative culture by mentoring peers and sharing insights across cross-functional teams.
• Accelerating project timelines through layout automation and process optimization.

What You’ll Need:

• BTech/MTech in Electronics or Electrical Engineering.
• 6+ years of hands-on experience in analog/mixed-signal IP layout and verification for high-speed analog circuits.
• Advanced proficiency with CAD tools such as Custom Designer, Cadence Virtuoso, Calibre, ICV, and STAR-RXCT.
• Solid understanding of deep submicron effects, CMOS/FinFET process technologies, and advanced floor-planning techniques.
• Experience in layout design flow: LEF generation, DRC/LVS/LPE verification, power routing, EM/IR considerations, and DFM.
• Strong analytical, debugging, and troubleshooting skills; scripting experience for layout automation is a plus.

Who You Are:

• Innovative and eager to explore new technologies and methodologies.
• Excellent communicator with strong written and verbal skills for effective collaboration.
• Accountable and proactive, able to work independently with minimal supervision.
• Team player who thrives in collaborative, fast-paced environments.
• Detail-oriented with a commitment to delivering high-quality results.
• Adaptable and resourceful, able to solve complex problems creatively.

The Team You’ll Be A Part Of: You will join the Analog and Mixed Signal IP group at Synopsys—a dynamic team of expert layout engineers focused on developing cutting-edge high-speed analog integrated circuits. The team is committed to technical excellence, collaboration, and continuous innovation, supporting the development of industry-leading SerDes and mixed-signal IP blocks. You’ll work closely with talented professionals who value knowledge sharing, mentorship, and a culture of accountability.

Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.