The Network Switch Group at Broadcom has brought some of the most complex and cutting edge networking ASIC's and multi-chip solutions to market. The group develops ASIC's for L2/L3 switching and routing for various market segments. These products support the latest networking protocols and features as well as manage extremely large volumes of traffic in the order of tens of Terabits/sec. These networking ASIC's support a large number of ports and port speeds ranging from tens of Mb/s to hundreds of Gb/s as well as various line interfaces and protocols.
You will be responsible for the micro-architecture, design, RTL coding, debugging and synthesis of complex functional blocks in the Traffic Manager / Memory Management Unit used in Broadcom’s market leading network switch products.
Responsibilities include:
At least BSc and several years of related experience.
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