We Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are:
You are an industry-recognized thought leader in ASIC digital design and mixed-signal SoC architecture, with a career spanning two decades at the forefront of silicon innovation. Your technical vision has shaped product strategies and set industry standards for high-speed, high-complexity SoCs. As a Senior Architect or Fellow, you have demonstrated mastery in architecting, modeling, and validating next-generation silicon IP, particularly in SerDes and PHY domains, and have led the successful deployment of flagship products worldwide.
You have repeatedly established architectural frameworks for large-scale, cross-discipline teams, influencing both hardware and software roadmaps. Your expertise encompasses advanced hardware emulation (Zebu, HAPS), system validation, and the orchestration of complex verification environments using UVM and SystemVerilog. You are adept at leveraging data-driven approaches and automation, employing advanced scripting and custom tool development to optimize flows and drive efficiency at scale.
Your leadership is both strategic and hands-on; you mentor principal engineers and directors, foster a culture of technical excellence, and bridge executive vision with engineering execution. You are a trusted advisor to customers and internal stakeholders alike, translating business requirements into innovative architectural solutions. A champion of diversity, equity, and inclusion, you actively cultivate collaborative, high-performing teams and inspire the next generation of engineering leaders. Your commitment to continuous learning and industry engagement ensures Synopsys remains at the cutting edge of silicon technology.
What You’ll Be Doing:
- Defining and driving Synopsys’ global architecture strategy for advanced mixed-signal SoCs and next-generation SerDes/PHY IP.
- Setting technical direction and governance for design, emulation, and system validation across multiple product lines and project teams.
- Leading the design and implementation of scalable, reusable verification environments and methodologies that set industry benchmarks.
- Innovating and optimizing hardware emulation strategies on Zebu, HAPS, and hybrid platforms to accelerate time-to-market for complex SoCs.
- Orchestrating cross-functional initiatives with product management, software, and customer engineering teams to align architecture with business objectives.
- Mentoring senior staff, principal engineers, and architects, fostering technical growth and succession planning throughout the organization.
- Serving as a technical interface for strategic customers, providing architectural guidance, solutions to escalated challenges, and thought leadership at industry forums.
- Championing continuous improvement in design quality, test coverage, and functional safety through data analytics, automation, and best practices.
The Impact You Will Have:
- Shape the strategic roadmap for Synopsys’ silicon IP portfolio, influencing industry trends and customer adoption worldwide.
- Accelerate innovation by establishing best-in-class architectural and verification methodologies across the organization.
- Drive cross-team collaboration and knowledge transfer, building a robust pipeline of technical leaders and subject matter experts.
- Elevate product reliability, differentiation, and performance, securing Synopsys’ leadership in the high-speed interconnect and SoC markets.
- Provide executive-level technical counsel to internal stakeholders and customers, ensuring alignment on business-critical initiatives.
- Champion a culture of inclusion, technical excellence, and continuous learning across global teams.
- Enhance Synopsys’ visibility in industry standards bodies and technical forums, representing Synopsys as a leader in silicon innovation.
What You’ll Need:
- 20+ years of experience in ASIC digital design, mixed-signal SoC architecture, and technical leadership at the director, fellow, or distinguished architect level.
- Industry-recognized expertise in SerDes, PHY IP, and high-speed system protocols (PCIE, Ethernet, USB, etc.).
- Extensive experience architecting and deploying hardware emulation (Zebu, HAPS) and FPGA prototyping environments for complex SoCs.
- Mastery of UVM, SystemVerilog, and advanced verification methodologies at the system level.
- Proven ability to drive large-scale automation and workflow improvements using Shell, Perl, Python, C++, and custom tool development.
- Track record of technical leadership in multi-site, cross-functional environments, including mentoring at the principal and director levels.
- Exceptional communication skills, with experience presenting to executive leadership, customers, and industry consortia.
- Experience influencing industry standards and contributing to technical publications or patents is highly desirable.
- Advanced degree (MS/PhD) in Electrical Engineering, Computer Engineering, or related field preferred.
Who You Are:
- A visionary architect and strategic problem-solver with a global perspective on silicon innovation.
- An inspiring mentor, role model, and technical authority, trusted by senior engineers and executives alike.
- Highly organized, decisive, and able to navigate complexity and ambiguity in fast-paced environments.
- Adaptable, intellectually curious, and committed to continuous professional growth and industry engagement.
- A champion for diversity, equity, and inclusion, dedicated to building high-performing, collaborative teams.
The Team You’ll Be A Part Of:
You will join Synopsys’ most senior technical community—a diverse, world-class team of distinguished engineers, fellows, and principal architects. This team defines the technical vision and strategy for Synopsys’ flagship silicon IP and SoC products, collaborating across business units, geographies, and with leading global customers. As a senior architect, you will shape the future of semiconductor innovation, mentor emerging leaders, and ensure Synopsys remains synonymous with technical excellence and industry leadership.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.